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Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
Table 6. Control Register
BIT ID
BIT
NAME
PWR-UP
STATE
BIT LOCATION
0 = LSB
FUNCTION
A logic high doubles the charge pump current selected through registers
CPX
CP_MULT
1
0
CP1 and CP0. Logic low sets the charge-pump current to the value
selected by registers CP1 and CP0.
XX
BE
TE
PD
INT
XX
BUFEN
TXEN
PWDN
INT_MODE
XX
1
1
0
0
1
2
3
4
5
Unused.
High enables the VCO buffer. Low disables this output.
Low enables SW_MUTE mode, which shuts down the RF circuits while
leaving the 3-wire interface, register, and PLL circuits active.
Low enables register-based shutdown. This mode shuts down all circuits
except the 3-wire interface and internal registers.
Logic high disables the sigma-delta modulator. Logic low enables the
sigma-delta modulator for normal operation.
Table 7. Device Modes
MODE
HW PINS
SOFTWARE CONTROL
BITS
DESCRIPTION
SHDN
TXEN
SYNEN
BUFEN
PWDN
TXEN BUFEN
TX
H
H
H
H/L
H
H
H/L
All circuits active.
Modulator circuits active. Synthesizer
MOD
H
H
L
H/L
H
H
H/L
blocks disabled. Mode is used with external
PLL circuit.
Serial interface and synthesizer blocks
SYNTH
H
L
H
H/L
H
X
H/L
active. RF and modulator blocks disabled.
Mode is used to gate RF ON/OFF with
external logic control.
Serial interface and synthesizer blocks all
SW_MUTE
H
H
H
H/L
H
L
H/L
active. Modulator blocks disabled. Mode is
used to gate RF ON/OFF with software
control.
HW_SHDN
L
X
X
X
X
X
X
All circuits disabled. Lowest current mode
of operation.
Serial interface and registers active, all
SW_SHDN
H
X
X
X
L
X
X
other circuits inactive regardless of the
state of the HW pins with the exception of
HW_SHDN.
Power-Supply (V CC ) Bypassing
Proper voltage-supply bypassing is essential to reduce
the spurious emissions mentioned above. It is recom-
mended that each V CC pin be bypassed independently
and share no common vias with any other ground con-
nection. See the Typical Operating Circuit for suggest-
ed bypass component values.
12
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